ADC 6021 Spécifications télécharger pdf (Page 92)

MYXPM6021*

Revision 1.1 - 10/21/14

*Advanced information. Subject to change without notice.

MYXPM6021*

Form #: CSI-D-685 Document 011

Table56:SecondLevelInterrupt(continued)

Interrupt Name Register Source

First-Level

Interrupt

Status Bit Description

CHRG CHGRIRQ Charger Control

Unit

CHGR Triggered when an interrupt input from

the external discrete charger is

generated.

GPIOxPx GPIOIRQ GPIO GPIO DINxPx Each GPIO pin can be congured as

input with programmable interrupt edge

for rise, fall or both.

VHDMIOCP VHDMIIRQ VHDMI VHDMIOCP Bit is set when VHDMI over current

condition occurs if not masked

1 2 ... 87 88 89 90 91 92 93 94 95 96 97 ... 112 113

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ADC 6021 Spécifications Page 92