ADC 6021 Spécifications télécharger pdf (Page 89)

MYXPM6021*

Revision 1.1 - 10/21/14

*Advanced information. Subject to change without notice.

MYXPM6021*

Form #: CSI-D-685 Document 011

Figure 39: 1st Level Interrupt

17.3 Second Level Interrupt

WhileFirst-LevelInterruptbitsinformtheinterrupthandlerofwhichsub-blockinterrupted,second-levelinterruptregisters/

bitsprovidetheinterrupthandlerwiththespecicnatureoftheblock‘sinterruptevent.

If any bits are set in a second-level interrupt mask, then the appropriate second level interrupt bit is prevented from

assertingtherstlevelinterruptbitforthecorrespondingsub-block,norwillthebitbecomeset.(Onlyunmasked2ndlevel

interruptbitsmaybeset).

Thetablebelowsummarizesthesecondlevelinterrupts.

Table 56: Second Level Interrupt

Interrupt Name Register Source

First-Level

Interrupt

Status Bit Description

VBUSDET PWRSRCIRQ Input Power

Source Detection

PWRSRC SVBUSDET Indicates that a valid VBUS voltage is

detected or removed.

DCINDET PWRSRCIRQ Input Power

Source Detection

PWRSRC SDCINDET Triggered when a AC/DC adapter has

been detected or removed.

BATDET PWRSRCIRQ Input Power

Source Detection

PWRSRC SBATDET Interrupt is triggered when a battery is

connected or disconnected.

SYS0ALRT0 THRMIRQ0 Thermal Control

Unit

THRM Set by the thermal state machine when

a system thermistor 0 temperature

thermal alert0 occurs

1 2 ... 84 85 86 87 88 89 90 91 92 93 94 ... 112 113

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ADC 6021 Spécifications Page 89