ADC 6021 Spécifications Page 61

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MYXPM6021*
Revision 1.1 - 10/21/14
*Advanced information. Subject to change without notice.
61
MYXPM6021*
Form #: CSI-D-685 Document 011
Table33:ElectricalParameterforBOOST_V5P0S(continued)
Parameter Description Test Conditions Min Typ Max Unit
ILIMIT Current limitation Cycle by cycle 1.3*Imax mA
Efciency at VSYS = 3.7V &
Tamb=60°C with proposed
external components and
PCB layout
See Figure 25
Sleep Mode – Pulse Skipping (PSK)
Efciency at VSYS = 3.7V &
Tamb=60°C with proposed
external components and
PCB layout
See Figure 25
Notes:
1. IncludingDCaccuracy,rippleandloadregulation
2. IncludingDCaccuracy,rippleandloadregulation
Figure 25: V5P0S Efciency
9.6.12.2 V5P0S Subsystems
VHOST:
Thisvoltagerailisusedforthe5VVBUSprovidingpowertotheUSB2/3host,switchedbyanexternalpowerswitch.
Themaximumcurrentofthispowerdomainis900mA.
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