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ADC12D1800RF
www.ti.com
SNAS518I JULY 2011REVISED JANUARY 2014
ADC12D1800RF 12-Bit, Single 3.6 GSPS RF Sampling ADC
Check for Samples: ADC12D1800RF
1 Introduction
1.1 Features
12
Excellent Noise and Linearity up to and Above Key Specifications
f
IN
= 2.7 GHz
Resolution: 12 Bits
Configurable to Either 3.6 GSPS Interleaved or
Interleaved 3.6 GSPS ADC
1800 MSPS Dual ADC
IMD3 (Fin = 2.7GHz @ -13dBFS) -62 dBc
New DESCLKIQ Mode for High Bandwidth, High
(typ)
Sampling Rate Apps
IMD3 (Fin = 2.7GHz @ -16dBFS) -64 dBc
Pin-Compatible with ADC1xD1x00,
(typ)
ADC12Dx00RF
Noise Floor Density -155.0 dBm/Hz (typ)
AutoSync Feature for Multi-Chip
Power 4.29 W (typ)
Synchronization
Dual 1800 MSPS ADC, Fin = 498 MHz
Internally Terminated, Buffered, Differential
ENOB 9.3 Bits (typ)
Analog Inputs
SNR 58.1 dB (typ)
Interleaved Timing Automatic and Manual Skew
SFDR 71.7 dBc (typ)
Adjust
Power per Channel 2.15 W (typ)
Test Patterns at Output for System Debug
Time Stamp Feature to Capture External
Trigger
Programmable Gain, Offset, and t
AD
Adjust
Feature
1:1 Non-demuxed or 1:2 Demuxed LVDS
Outputs
1.2 Applications
3G/4G Wireless Basestation SIGINT
Receive Path
RADAR / LIDAR
DPD Path
Wideband Communications
Wideband Microwave Backhaul
Consumer RF
RF Sampling Software Defined Radio
Test and Measurement
Military Communications
1.3 Description
The 12-bit 1.8 GSPS ADC12D1800RF is an RF-sampling GSPS ADC that can directly sample input
frequencies up to and above 2.7 GHz. The ADC12D1800RF augments the very large Nyquist zone of TI’s
GSPS ADCs with excellent noise and linearity performance at RF frequencies, extending its usable range
beyond the 3
rd
Nyquist zone.
The ADC12D1800RF provides a flexible LVDS interface which has multiple SPI programmable options to
facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-
1996 and supports programmable common mode voltage. The product is packaged in a lead-free 292-ball
thermally enhanced BGA package over the rated industrial temperature range of -40°C to +85°C.
To achieve the full rated performance for Fclk > 1.6 GHz, it is necessary to write the max power
settings once to Register 6h via the Serial Interface; see Register Definitions for more information.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products conform to
Copyright © 2011–2014, Texas Instruments Incorporated
specifications per the terms of the Texas Instruments standard warranty. Production
processing does not necessarily include testing of all parameters.
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