ADC12D1800RF
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SNAS518I –JULY 2011–REVISED JANUARY 2014
3.13 Converter Electrical Characteristics
Serial Port Interface
ADC12D1800RF
Units
Symbol Parameter Conditions
(Limits)
Typ Lim
f
SCLK
Serial Clock Frequency See
(1)
15 MHz
Serial Clock Low Time 30 ns (min)
Serial Clock High Time 30 ns (min)
t
SSU
Serial Data-to-Serial Clock Rising See
(2)
2.5 ns (min)
Setup Time
t
SH
Serial Data-to-Serial Clock Rising See
(1)
1 ns (min)
Hold Time
t
SCS
SCS-to-Serial Clock Rising Setup See
(2)
2.5 ns
Time
t
HCS
SCS-to-Serial Clock Falling Hold See
(2)
1.5 ns
Time
t
BSU
Bus turn-around time See
(2)
10 ns
(1) This parameter is specified by design and is not tested in production.
(2) This parameter is specified by design and/or characterization and is not tested in production.
3.14 Converter Electrical Characteristics Calibration
ADC12D1800RF
Units
Symbol Parameter Conditions
(Limits)
Typ Lim
t
CAL
Calibration Cycle Time Non-ECM
Sampling
ECM CSS = 0b 4.1·10
7
Clock
Cycles
ECM CSS = 1b
t
CAL_L
CAL Pin Low Time See
(1)
1280 Sampling
Clock
t
CAL_H
CAL Pin High Time See
(1)
Cycles
1280
(min)
t
CalDly
Calibration delay determined by CalDly = Low 2
24
Sampling
CalDly Pin
(1)
Clock
CalDly = High
Cycles
2
30
(max)
(1) This parameter is specified by design and is not tested in production.
Copyright © 2011–2014, Texas Instruments Incorporated Electrical Specifications 29
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