ADC ACE-COM L1 Spécifications Page 8
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Noté. / 5. Basé sur avis des utilisateurs
8 JN-DS-JN5148-001 1v9 © NXP Laboratories UK 2013
1.4 Block Diagram
32-bit RISC CPU
Reset
SPI
Master
MUX
UART0
UART1
Wakeup
Timer1
Wakeup
Timer0
Security
Coprocessor
DIO6/TXD0/JTAG_TDO
DIO7/RXD0/JTAG_TDI
DIO4/CTS0/JTAG_T CK
DIO5/RTS0/JTAG_T MS
DIO19/TXD1/JTAG_TDO
DIO17/CTS1/IP_SEL/DAI_SCK/
J T A G_T CK
DIO18/RTS1/IP_INT/DAI_SDOUT/
J TA G_T MS
Digital
Baseband
Radio
Programmable
Interrupt
Controller
Timer0
2-wire
Interf ace
Timer1
SPICLK
DIO10/TIM0OUT/32KXTALOUT
SPIMOSI
SPIMISO
SPISEL0
DIO0/SPISEL1
DIO3/SPISEL4/RFTX
DIO2/SPISEL3/RFRX
DIO1/SPISEL2/PC0
DIO9/TIM0CAP/32KXTALIN/32KIN
DIO8/TIM0CK_GT/PC1
DIO13/TIM1OUT/ADE/DAI_SDIN
DIO11/TIM1CK_GT/TIM2OUT
DIO12/TIM1CAP/ADO/DAI_WS
DIO14/SIF_CLK/IP_CLK
DIO15/SIF_D/IP_DO
DIO16/RXD1/IP_DI/JTAG_TDI
From Peripherals
RE SET N
Wireless
Transceiv er
32MHz Clock
Generator
XT A L_ IN
XT A L_ OUT
RF_IN
VCOTUNE
Tick Timer
Voltage
Regulators
1.8V
VDD1
VDD2
Intelligent
Peripheral
IBAIS
VB_XX
Clock Divider
Multiplier
Timer2
SPISEL1
SPISEL2
SPISEL3
SPISEL4
TXD0
RXD0
RTS0
CTS0
TXD1
RXD1
RTS1
CTS1
TIM0CK_GT
TIM 0 CA P
TIM0OUT
TIM1CK_GT
TIM 1 CA P
TIM1OUT
TIM2OUT
SIF_D
S IF_CLK
IP_DO
I P _DI
IP _ INT
IP_CLK
IP_SEL
4-wire
Digital
Audio
Interf ace
I2S_OUT
I2S_DIN
I2S_CLK
I2S_SYNC
Pulse
Counters
PC0
PC1
JTAG
Debug
JTAG_TDI
JTAG_TMS
JTAG_TCK
JTAG_TDO
RAM
128kB
ROM
128kB
OTP
eFuse
32kHz
RC
Osc
32kHz Clock
Select
32KIN
32kHz
Cl oc k
Gen
32KXTALIN
32KXTALOUT
Antenna
Div ersity
ADO
ADE
T i me
Of
Flight
Sample
FIFO
DIO20/RXD1/JTAG_TDI
24MHz
RC Osc
Comparator2
COMP 2 P
COMP 2 M
Comparator1
COMP1P/
EXT _PA_ C
COMP 1 M/
EXT _PA_ B
DAC1
DAC2
DAC1
DAC2
ADC
M
U
X
ADC4
ADC1
ADC2
ADC3
Temperature
Sensor
Supply Monitor
CPU and 16MHz
System Clock
Watchdog
Timer
Brown-out
Detect
Figure 1: JN5148 Block Diagram
DIO 16/IP_DI
- Data Sheet: JN5148-001 1
- Contents 2
- 20 Analogue Peripherals 58 4
- 1 Introduction 6
- 1.3 Peripherals 7
- 1.4 Block Diagram 8
- 2 Pin Configurations 9
- 2.1 Pin Assignment 10
- 2.2 Pin Descriptions 12
- 2.2.5 Analogue Peripherals 13
- 2.2.6 Digital Input/Output 13
- 4 Memory Organisation 16
- 4.4 External Memory 17
- 4.2 RAM 17
- 4.3 OTP eFuse Memory 17
- 4.5 Peripherals 18
- 4.6 Unused Memory Addresses 18
- 5 System Clocks 19
- 32KXTALOUT 20
- 32KXTALIN 20
- 6 Reset 21
- 6.2 External Reset 22
- 6.3 Software Reset 22
- 6.4 Brown-out Detect 23
- 6.5 Watchdog Timer 23
- 7 Interrupt System 24
- 7.3 Hardware Interrupts 25
- 8 Wireless Transceiver 26
- 8.1.2 Antenna Diversity 27
- ADO (DIO[12]) 28
- TX Active 28
- RX Active 28
- ADE (DIO[13]) 28
- 8.2 Modem 29
- 8.3 Baseband Processor 30
- 8.4 Security Coprocessor 31
- 8.5 Location Awareness 31
- 8.6 Higher Data Rates 32
- 9 Digital Input/Output 33
- Figure 22 DIO Block Diagram 34
- 11 Timers 38
- 11.1.2 Capture Mode 39
- 11.1.3 Counter/Timer Mode 40
- 11.1.4 Delta-Sigma Mode 40
- 11.2 Tick Timer 41
- 11.3 Wakeup Timers 42
- 12 Pulse Counters 44
- 13 Serial Communications 45
- 13.1 Interrupts 46
- 13.2 UART Application 46
- 14 JTAG Debug Interface 47
- 15 Two-Wire Serial Interface 48
- 15.2 Clock Stretching 49
- Right R2 R1 R0 L2 L1 L0Left 52
- R2 R1 R0 L2 L1 L0 52
- 17 Random Number Generator 53
- 18 Sample FIFO 54
- 19.1 Data Transfer Format 55
- 20 Analogue Peripherals 58
- 20.1.1 Operation 59
- 20.1.2 Supply Monitor 60
- 20.1.3 Temperature Sensor 60
- 20.2.1 Operation 60
- 20.3 Comparators 61
- 21.1 Operating Modes 62
- 21.2 Active Processing Mode 62
- 21.3 Sleep Mode 62
- 21.4 Deep Sleep Mode 63
- 22.1 Maximum Ratings 64
- 22.2.2.1 Active Processing 65
- 22.2.2.2 Sleep Mode 65
- 22.2.2.3 Deep Sleep Mode 65
- 22.3 AC Characteristics 66
- Internal RESET 67
- 22.3.2 SPI MasterTiming 68
- 22.3.7 Bandgap Reference 71
- 22.3.10 Comparators 73
- 22.3.11 32kHz RC Oscillator 73
- 22.3.14 24MHz RC Oscillator 75
- 22.3.15 Temperature Sensor 75
- 22.3.16 Radio Transceiver 76
- A.2 PCB Decal 82
- A.3 Ordering Information 83
- JN5148-001 84
- B.1 Crystal Oscillators 88
- B.2 32MHz Oscillator 90
- 32MHz Crystal Oscillator 91
- B.3 32kHz Oscillator 92
- Normalised Current (IDD) 93
- B.4.1 Schematic Diagram 94
- Related Documents 97
- RoHS Compliance 97
- Status Information 97
- Disclaimers 98
- Trademarks 98
- Version Control 99
- Contact Details 100
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