ADC 2 Spécifications Page 25

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ADS7865
www.ti.com
SBAS441C OCTOBER 2008REVISED APRIL 2012
LAYOUT Depending on the circuit density of the board,
placement of the analog and digital components, and
For optimum performance, care should be taken with
the related current loops, a single solid ground plane
the physical layout of the ADS7865 circuitry. This
for the entire printed circuit board (PCB) or a
caution is particularly true if the CLOCK input
dedicated analog ground area may be used. In an
approaches the maximum throughput rate. In this
instance of a separated analog ground area, ensure a
case, it is recommended to have a fixed phase
low-impedance connection between the analog and
relationship between CLOCK and CONVST.
digital ground of the ADC by placing a bridge
underneath (or next to) the ADC. Otherwise, even
Additionally, the basic SAR architecture is quite
short undershoots on the digital interface with a value
sensitive to glitches or sudden changes on the power
lower than 300mV may lead to conduction of ESD
supply, reference, ground connections, and digital
diodes, causing current flow through the substrate
inputs that occur just before latching the output of the
and degrading the analog performance.
analog comparator. Therefore, when driving any
single conversion for an n-bit SAR converter, there
During the PCB layout process, care should also be
are n windows in which large external transient
taken to avoid any return currents crossing any
voltages can affect the conversion result. Such
sensitive analog areas or signals. No signal must
glitches might originate from switching power
exceed the limit of –300mV with regard to the
supplies, nearby digital logic, or high-power devices.
respective ground plane. Figure 37 illustrates the
The degree of error in the digital output depends on
recommended layout of the ground and power-supply
the reference voltage, layout, and the exact timing of
connections.
the external event. These errors can change if the
external event also changes in time with respect to
Supply
the CLOCK input.
The ADS7865 has two separate supplies: the BV
DD
With this possibility in mind, power to the ADS7865
pin for the digital interface and the AV
DD
pin for all
should be clean and well-bypassed. A 0.1μF ceramic
remaining circuits.
bypass capacitor should be placed as close to the
device as possible. In addition, a 1μF to 10μF BV
DD
can range from 2.7V to 5.5V, allowing the
capacitor is recommended. If needed, an even larger ADS7865 to easily interface with processors and
capacitor and a 5 or 10 series resistor may be controllers. To limit the injection of noise energy from
used to low-pass filter a noisy supply. external digital circuitry, BV
DD
should be filtered
properly. Bypass capacitors of 0.1μF and 10μF
If the reference voltage is external and originates
should be placed between the BV
DD
pin and the
from an operational amplifier, be sure that it can drive
ground plane.
the reference capacitor without oscillation. The
connection between the output of the external AV
DD
supplies the internal analog circuitry. For
reference driver and REF
IN
should be of low optimum performance, a linear regulator (for
resistance (10max) to minimize any code- example, the UA7805 family) is recommended to
dependent voltage drop on this path. generate the analog supply voltage in the range of
2.7V to 5.5V for the ADS7865 and the necessary
Grounding analog front-end circuitry.
All ground (AGND and BGND) pins should be Bypass capacitors should be connected to the ground
connected to a clean ground reference. These plane such that the current is allowed to flow through
connections should be kept as short as possible to the pad of the capacitor (that is, the vias should be
minimize the inductance of these paths. It is placed on the opposite side of the connection
recommended to use vias connecting the pads between the capacitor and the power-supply pin of
directly to the ground plane. In designs without the ADC).
ground planes, the ground trace should be kept as
wide as possible. Avoid connections that are too near Digital Interface
the grounding point of a microcontroller or digital
To further optimize device performance, a series
signal processor.
resistor of 10 to 100 can be used on each digital
pin of the ADS7865. In this way, the slew rates of the
input and output signals are reduced, limiting the
noise injection from the digital interface.
Copyright © 2008–2012, Texas Instruments Incorporated 25
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